PIC18F97J60_11 Datasheet, PDF (200/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 18-1: PIN CONFIGURATIONS FOR ECCP1
ECCP Mode
CCP1CON
Configuration
RC2
RD0 or
RE6⁽¹⁾
RE5
RG4
RH7⁽²⁾
RH6⁽²⁾
64-Pin Devices; 80-Pin Devices, ECCPMX = 1;
100-Pin Devices, ECCPMX = 1, Microcontroller mode or
Extended Microcontroller mode with 12-Bit Address Width:
Compatible CCP 00xx 11xx ECCP1 RD0/RE6
RE5 RG4/CCP5 RH7/AN15 RH6/AN14
Dual PWM
Quad PWM
10xx 11xx
P1A
P1B
RE5 RG4/CCP5 RH7/AN15 RH6/AN14
x1xx 11xx
P1A
P1B
P1C
P1D
RH7/AN15 RH6/AN14
Compatible CCP
80-Pin Devices, ECCPMX = 0;
100-Pin Devices, ECCPMX = 0, All Program Memory modes:
00xx 11xx ECCP1 RD0/RE6 RE5/AD13 RG4/CCP5 RH7/AN15
RH6/AN14
Dual PWM
Quad PWM⁽³⁾
10xx 11xx
x1xx 11xx
P1A
RD0/RE6 RE5/AD13 RG4/CCP5 P1B
RH6/AN14
P1A
RD0/RE6 RE5/AD13
P1D
P1B
P1C
100-Pin Devices, ECCPMX = 1, Extended Microcontroller mode with 16-Bit or 20-Bit Address Width:
Compatible CCP 00xx 11xx ECCP1 RD0/RE6 RE5/AD13 RG4/CCP5 RH7/AN15 RH6/AN14
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP1 in a given mode.
Note 1: P1B is multiplexed with RD0 in 64-pin devices, and RE6 on 80-pin and 100-pin devices.
2: These pin options are not available in 64-pin devices.
3: With ECCP1 in Quad PWM mode, the CCP5 pin’s output is overridden by P1D; otherwise, CCP5 is fully
operational.
TABLE 18-2: PIN CONFIGURATIONS FOR ECCP2
ECCP Mode
CCP2CON
Configuration
RB3
RC1
RE7
RE2
RE1
All Devices, CCP2MX = 1, All Program Memory modes:
Compatible CCP 00xx 11xx RB3/INT3 ECCP2
RE7
RE2
RE1
Dual PWM
10xx 11xx RB3/INT3
P2A
RE7
P2B
RE1
Quad PWM
x1xx 11xx RB3/INT3
P2A
RE7
P2B
P2C
80-Pin and 100-Pin Devices, CCP2MX = 0, Microcontroller mode:
Compatible CCP 00xx 11xx RB3/INT3 RC1/T1OS1 ECCP2
RE2
RE1
Dual PWM
10xx 11xx RB3/INT3 RC1/T1OS1
P2A
P2B
RE1
Quad PWM
x1xx 11xx RB3/INT3 RC1/T1OS1
P2A
P2B
P2C
100-Pin Devices, CCP2MX = 0, Extended Microcontroller mode:
Compatible CCP 00xx 11xx ECCP2 RC1/T1OS1 RE7/AD15 RE2/CS RE1/WR
Dual PWM
10xx 11xx
P2A
RC1/T1OS1 RE7/AD15
P2B
RE1/WR
Quad PWM
x1xx 11xx
P2A
RC1/T1OS1 RE7/AD15
P2B
P2C
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP2 in a given mode.
RE0
RE0
RE0
P2D
RE0
RE0
P2D
RE0/RD
RE0/RD
P2D
DS39762F-page 200
 2011 Microchip Technology Inc.