PIC18F97J60_11 Datasheet, PDF (26/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 1-5: PIC18F86J60/86J65/87J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
RB0/INT0/FLT0
RB0
INT0
FLT0
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
5
I/O
TTL
Digital I/O.
I
ST
External Interrupt 0.
I
ST
Enhanced PWM Fault input (ECCP modules); enabled
in software.
RB1/INT1
RB1
INT1
6
I/O
TTL
Digital I/O.
I
ST
External Interrupt 1.
RB2/INT2
RB2
INT2
7
I/O
TTL
Digital I/O.
I
ST
External Interrupt 2.
RB3/INT3
RB3
INT3
8
I/O
TTL
Digital I/O.
I
ST
External Interrupt 3.
RB4/KBI0
RB4
KBI0
54
I/O
TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
RB5/KBI1
RB5
KBI1
53
I/O
TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
RB6/KBI2/PGC
RB6
KBI2
PGC
52
I/O
TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
47
I/O
TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP programming data pin.
Legend:
Note 1:
2:
3:
4:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
DS39762F-page 26
 2011 Microchip Technology Inc.