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PIC18F97J60_11 Datasheet, PDF (214/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet
PIC18F97J60 FAMILY
18.4.9 SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the ECCP1 module for PWM operation:
1. Configure the PWM pins, P1A and P1B (and
P1C and P1D, if used), as inputs by setting the
corresponding TRIS bits.
2. Set the PWM period by loading the PR2 (PR4)
register.
3. Configure the ECCP1 module for the desired
PWM mode and configuration by loading the
CCP1CON register with the appropriate values:
• Select one of the available output
configurations and direction with the
P1M<1:0> bits.
• Select the polarities of the PWM output
signals with the CCP1M<3:0> bits.
4. Set the PWM duty cycle by loading the CCPR1L
register and the CCP1CON<5:4> bits.
5. For auto-shutdown:
• Disable auto-shutdown; ECCP1ASE = 0
• Configure auto-shutdown source
• Wait for Run condition
6. For Half-Bridge Output mode, set the
dead-band delay by loading ECCP1DEL<6:0>
with the appropriate value.
7. If auto-shutdown operation is required, load the
ECCP1AS register:
• Select the auto-shutdown sources using the
ECCP1AS<2:0> bits.
• Select the shutdown states of the PWM
output pins using PSS1AC<1:0> and
PSS1BD<1:0> bits.
• Set the ECCP1ASE bit (ECCP1AS<7>).
8. If auto-restart operation is required, set the
P1RSEN bit (ECCP1DEL<7>).
9. Configure and start TMR2 (TMR4):
• Clear the TMRx interrupt flag bit by clearing
the TMRxIF bit (PIR1<1> for Timer2 or
PIR3<3> for Timer4).
• Set the TMRx prescale value by loading the
TxCKPS bits (T2CON<1:0> for Timer2 or
T4CON<1:0> for Timer4).
• Enable Timer2 (or Timer4) by setting the
TMRxON bit (T2CON<2> for Timer2 or
T4CON<2> for Timer4).
10. Enable PWM outputs after a new PWM cycle
has started:
• Wait until TMR2 (TMR4) overflows (TMRxIF
bit is set).
• Enable the ECCP1/P1A, P1B, P1C and/or
P1D pin outputs by clearing the respective
TRIS bits.
• Clear the ECCP1ASE bit (ECCP1AS<7>).
18.4.10 EFFECTS OF A RESET
Both Power-on Reset and subsequent Resets will force
all ports to Input mode and the CCPx/ECCPx registers
to their Reset states.
This forces the Enhanced CCPx modules to reset to a
state compatible with the standard CCPx modules.
DS39762F-page 214
 2011 Microchip Technology Inc.