PIC18F97J60_11 Datasheet, PDF (343/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine acquisition time, see Section 22.1 “A/D
Acquisition Requirements”. After this acquisition
time has elapsed, the A/D conversion can be started.
An acquisition time can be programmed to occur
between setting the GO/DONE bit and the actual start
of the conversion.
The following steps should be followed to do an A/D
conversion:
1. Configure the A/D module:
• Configure analog pins, voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time (if required).
4. Start conversion:
• Set GO/DONE bit (ADCON0<1>)
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6. Read A/D Result registers (ADRESH:ADRESL);
clear bit, ADIF, if required.
7. For the next conversion, go to Step 1 or Step 2,
as required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2 TAD is
required before next acquisition starts.
FIGURE 22-2:
ANALOG INPUT MODEL
VDD
RS
ANx
VT = 0.6V
RIC 1k
Sampling
Switch
SS _RSS
VAIN
CPIN
5 pF
VT = 0.6V
ILEAKAGE
±100 nA
CHOLD = 25 pF
VSS
Legend:
CPIN
VT
ILEAKAGE
RIC
SS
CHOLD
RSS
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
various junctions
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch Resistance
VDD
1 23 4
Sampling Switch (k
 2011 Microchip Technology Inc.
DS39762F-page 343