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PIC18F97J60_11 Datasheet, PDF (228/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet | |||
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PIC18F97J60 FAMILY
REGISTER 19-2: ECON2: ETHERNET CONTROL REGISTER 2
R/W-1
R/W-0(1)
R/W-0
U-0
U-0
U-0
AUTOINC PKTDEC
ETHEN
â
â
â
bit 7
U-0
U-0
â
â
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4-0
AUTOINC: Automatic Buffer Pointer Increment Enable bit
1 = Automatically increment ERDPT or EWRPT registers on reading from, or writing to, EDATA
0 = Do not automatically change ERDPT and EWRPT registers after EDATA is accessed
PKTDEC: Packet Decrement bit(1)
1 = Decrement the EPKTCNT register by one
0 = Leave EPKTCNT unchanged
ETHEN: Ethernet Module Enable bit
1 = Ethernet module is enabled
0 = Ethernet module is disabled
Unimplemented: Read as â0â
Note 1: This bit is automatically cleared once it is set.
REGISTER 19-3: ESTAT: ETHERNET STATUS REGISTER
U-0
â
bit 7
R/C-0
U-0
BUFER
â
R/C-0
U-0
r
â
R-0
RXBUSY
R/C-0
TXABRT
R-0
PHYRDY
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
C = Clearable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as â0â
bit 6
BUFER: Ethernet Buffer Error Status bit
1 = An Ethernet read or write has generated a buffer error (overrun or underrun)
0 = No buffer error has occurred
bit 5
Unimplemented: Read as â0â
bit 4
Reserved: Write as â0â
bit 3
Unimplemented: Read as â0â
bit 2
RXBUSY: Receive Busy bit
1 = Receive logic is receiving a data packet
0 = Receive logic is Idle
bit 1
TXABRT: Transmit Abort Error bit
1 = The transmit request was aborted
0 = No transmit abort error
bit 0
PHYRDY: Ethernet PHY Clock Ready bit
1 = Ethernet PHY start-up timer has expired; PHY is ready
0 = Ethernet PHY start-up timer is still counting; PHY is not ready
DS39762F-page 228
ï£ 2011 Microchip Technology Inc.
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