PIC18F97J60_11 Datasheet, PDF (237/492 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
REGISTER 19-12: PHSTAT2: PHYSICAL LAYER STATUS REGISTER 2
U-0
—
bit 15
U-0
R-0
R-0
R-0
R-0
R-x
—
TXSTAT
RXSTAT COLSTAT
LSTAT
r
U-0
—
bit 8
U-0
U-0
R-0
U-0
U-0
U-0
U-0
U-0
—
—
r
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8-6
bit 5
bit 4-0
Unimplemented: Read as ‘0’
TXSTAT: PHY Transmit Status bit
1 = PHY is transmitting data
0 = PHY is not transmitting data
RXSTAT: PHY Receive Status bit
1 = PHY is receiving data
0 = PHY is not receiving data
COLSTAT: PHY Collision Status bit
1 = A collision is occuring (PHY is both transmitting and receiving while in Half-Duplex mode)
0 = A collision is not occuring
LSTAT: PHY Collision Status bit
1 = Link is up
0 = Link is down
Reserved: Ignore on read
Unimplemented: Read as ‘0’
Reserved: Ignore on read
Unimplemented: Read as ‘0’
 2011 Microchip Technology Inc.
DS39762F-page 237