HD6475348R Datasheet, PDF (476/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Table E-1 Port State (cont)
Port
Pin Name
P63 to P60
A19 to A16
P77 to P70
P87 to P80
P97 to P90
Mode Reset
1
2T
3L
4T
7
1
2
3T
4
7
1
2
3T
4
7
1
2
3T
4
7
Hardware
Standby
Mode
Software
Standby Mode Sleep Mode
keep
keep
T
T
L
T^*6
*5
keep
keep
T
keep^*2
keep
T
T
T
T
keep^*2
keep
Bus
Program Execution
Release Mode State (Normal Operation)
keep
Input/output port
T
T^*6
——
A19 to A16
Address bus or input port
Input/output port
keep
Input/output port
T
Input port
keep
Input/output port
H: High logic level
L: Low logic level
T: High-Impedance state
keep: Input ports are in the high-impedance state. Output ports hold their previous output values.
If DDR = 0 and DR = 1 in ports 5 and 6, the MOS pull-ups remain on.
*1 The on-chip supporting modules are reset, so P17 becomes an input or output port controlled by
DDR and DR. If P12 is programmed for BACK output, it goes to the high-impedance state.
*2 The on-chip supporting modules are reset, so these pins become input or output ports controlled
by DDR and DR.
*3 BREQ can be received. BACK is High.
*4 BACK is Low.
*5 Address outputs are Low. Input ports are in the high-impedance state, or the MOS pull-ups are
on.
*6 Pins used as input ports with the MOS pull-up on (DDR = 0, DR = 1) do not go to the high-
impedance state. The MOS pull-up remains on.
466