HD6475348R Datasheet, PDF (312/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

15.5 Interrupts and the Data Transfer Controller
The ADI interrupt request is enabled or disabled by the ADIE bit in the ADCSR.
When the ADI bit in data transfer enable register DTEF (bit 4 at address H'FF0D) is set to 1, the
ADI interrupt is served by the data transfer controller. The DTC can be used to transfer A/D
results to a buffer in memory, or to an I/O port. The DTC automatically clears the ADF bit to 0.
Note: In scan mode, the DTC can transfer data for only one channel per interrupt, even if two or
more channels are selected.
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