HD6475348R Datasheet, PDF (270/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

14.1.2 Block Diagram
Figure 14-1 shows a block diagram of one serial communication interface channel.
Module data bus
Internal
data bus
RXD
TXD
SCK
RDR
RSR
TDR
TSR
Parity generator
SSR
SCR
SMR
Communication
control
Parity check
Clock
BRR
Baud-rate
generator
Internal clock
source
ø
ø/4
ø/16
ø/64
External clock
RDR: Receive Data Register
RSR: Receive Shift Register
TDR: Transmit Data Register
TSR: Transmit Shift Register
SSR: Serial Status Register
SCR: Serial Control Register
SMR: Serial Mode Register
BRR: Bit Rate Register
TXI
RXI
ERI
Interrupt signals
Figure 14-1 Block Diagram of Serial Communication Interface
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