HD6475348R Datasheet, PDF (437/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

SYSCR1—System Control Register 1
H'FEFC
Port 1
Bit
7
6
5
4
3
2
1
0
—
IRQ1E IRQ0E NMIEG BRLE
—
—
—
Initial value
1
0
0
0
0
1
1
1
Read/Write
—
R/W R/W R/W R/W
—
—
—
Bus Release Enable
0 P12 and P13 are I/O ports.
1 P12 is the BACK output pin and
P13 is the BREQ input pin.
Nonmaskable Interrupt Edge
0 An NMI request is generated on the
falling edge of the NMI pin input.
1 An NMI request is generated on the
rising edge of the NMI pin input.
Interrupt Request 0 Enable
0 P15 is an I/O port; IRQ0 input is disabled.
1 P15 is the IRQ0 input pin.
Interrupt Request 1 Enable
0 P16 is an I/O port; IRQ1 input is disabled.
1 P16 is the IRQ1 input pin.
427