HD6475348R Datasheet, PDF (10/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Section 15 A/D Converter
15.1 Overview ····························································································································283
15.1.1 Features ···················································································································283
15.1.2 Block Diagram ········································································································284
15.1.3 Input Pins ················································································································285
15.1.4 Register Configuration ····························································································285
15.2 Register Descriptions ·········································································································286
15.2.1 A/D Data Registers (ADDR)—H'FEE0 to H'FEE7 ················································286
15.2.2 A/D Control/Status Register (ADCSR)—H'FEE8 ·················································287
15.2.3 A/D Control Register (ADCR)—H'FEE9 ·······························································289
15.3 CPU Interface ·····················································································································290
15.4 Operation ····························································································································291
15.4.1 Single Mode (SCAN = 0) ·······················································································291
15.4.2 Scan Mode (SCAN = 1) ··························································································294
15.4.3 Input Sampling Time and A/D Conversion Time ···················································296
15.4.4 External Triggering of A/D Conversion ·································································297
15.5 Interrupts and the Data Transfer Controller ·······································································298
Section 16 RAM
16.1 Overview ····························································································································299
16.1.1 Block Diagram ········································································································299
16.1.2 Register Configuration ····························································································300
16.2 RAM Control Register (RAMCR) ·····················································································300
16.3 Operation ····························································································································300
16.3.1 Expanded Modes (Modes 1, 2, 3, and 4) ································································300
16.3.2 Single-Chip Mode (Mode 7) ···················································································301
Section 17 ROM
17.1 Overview ····························································································································303
17.1.1 Block Diagram ········································································································303
17.2 PROM Mode ······················································································································304
17.2.1 PROM Mode Setup ·································································································304
17.2.2 Socket Adapter Pin Arrangements and Memory Map ············································305
17.3 H8/534 Programming ·········································································································308
17.3.1 Writing and Verifying ·····························································································308
17.3.2 Notes on Writing ·····································································································311
17.4 H8/536 Programming ·········································································································312
17.4.1 Writing and Verifying ·····························································································312
17.4.2 Notes on Programming ···························································································315
17.5 Reliability of Written Data ·································································································317
17.6 Erasing of Data ···················································································································318