HD6475348R Datasheet, PDF (358/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Table 20-10 Timing Conditions of On-Chip
Supporting Modules (cont)
– Preliminary for S-Mask Versions–
6 MHz
Item
Symbol Min Max
SCI Input
(Async) tScyc 2
–
clock cycle _(Sync)
4–
Input
pulse width
tSCKW 0.4 0.6
Transmit (Sync) tTXD
–
100
data delay
Receive (Sync) tRXS
data setup
time
100 –
Receive
data hold
time
(Sync) tRXH
100 –
Port Output data
delay time
tPWD –
100
Input data setup time tPRS 50 –
Input data hold time tPRH 50 –
Condition A
Condition D
8 MHz
Min Max
2–
4–
0.4 0.6
– 100
100 –
100 –
– 100
50 –
50 –
Condition C
10 MHz
Min Max
2–
4–
0.4 0.6
– 100
100 –
100 –
– 100
50 –
50 –
Condition B
16 MHz
Test
Min Max Unit Conditions
2–
4–
tcyc See figure
tcyc ^20-20
0.4 0.6 tScyc
– 100 ns
100 – ns
See figure
20-21
100 – ns
– 100 ns See figure
20-13
50 – ns
50 – ns
• Measurement Conditions for AC Characteristics
5V
H8/534
(H8/536)
output pin
RH
C
RL
C = 90 pF: P1, P2, P3, P4, P5, P6
= 30 pF: P7, P9
R L = 2.4 kΩ
R H = 12 kΩ
Input/output timing reference levels
Low: 0.8 V
High: 2.0 V
Figure 20-3 Output Load Circuit
347