HD6475348R Datasheet, PDF (306/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

3. ADF = 1 and ADIE = 1, so an A/D interrupt is requested.
4. The user-coded A/D interrupt-handling routine is started.
5. The interrupt-handling routine reads the ADCSR value, then writes a 0 in the ADF bit to clear
this bit to 0.
6. The interrupt-handling routine reads and processes the A/D conversion result.
7. The routine ends.
Steps 2 to 7 can now be repeated by setting the ADST bit to 1 again.
If the data transfer enable (DTE) bit is set to 1, the interrupt is served by the data transfer
controller (DTC). Steps 4 to 7 then change as follows.
4’. The DTC is started.
5’. The DTC automatically clears the ADF bit to 0.
6’. The DTC transfers the A/D conversion result from ADDRB to a specified destination address.
7’. The DTC ends.
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