HD6475348R Datasheet, PDF (375/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Arith-
metic
opera-
tions
Shift
opera-
tions
Mnemonic
Operation
EXTS
(< Bit 7 > of < Rd >)
→ (< Bit 15 to 8 > of < Rd >)
EXTU
0 → (<Bit 15 to 8 > of < Rd >)
TST
(EAd) – 0, Set CCR
NEG
0 – (EAd) → (EAd)
CLR
0 → (EAd)
TAS
(EAd) – 0, Set CCR
SHAL
(1)₂ → (< Bit 7 > of < EAd >)
MSB
C
LSB
0
SHAR
MSB
LSB
C
SHLL
MSB
C
LSB
0
SHLR
MSB
0
LSB
C
ROTL
MSB
LSB
C
ROTR
ROTXL
MSB
MSB
C
LSB
C
LSB
ROTXR
Logic AND
opera- OR
tions XOR
NOT
Bit
BSET
manipu-
lations BCLR
BTST
BNOT
MSB
LSB
C
Rd ∧ (EAs) → Rd
Rd ∨ (EAs) → Rd
Rd ⊕ (EAs) → Rd
¬ (EAd) → (EAd)
¬ (< Bit number > of < EAd >) → Z
1 → (< Bit number > of < EAd >)
¬ (< Bit number > of < EAd >) → Z
0 → (< Bit number > of < EAd >)
¬ (< Bit number > of < EAd >) → Z
¬ (< Bit number > of < EAd >) → Z
→ (< Bit number > of < EAd >)
Size CCR Bit
B/W N Z V C
B ¤ ¤00
B0
B/W ¤
B/W ¤
B/W 0
B¤
¤00
¤00
¤0¤
100
¤00
B/W ¤ ¤ ¤ ¤
B/W ¤ ¤ 0 ¤
B/W ¤ ¤ 0 ¤
B/W 0 ¤ 0 ¤
B/W ¤ ¤ 0 ¤
B/W ¤ ¤ 0 ¤
B/W ¤ ¤ 0 ¤
B/W ¤ ¤ 0 ¤
B/W ¤ ¤
B/W ¤ ¤
B/W ¤ ¤
B/W ¤ ¤
B/W — ¤
0—
0—
0—
0—
——
B/W — ¤ — —
B/W — ¤ — —
B/W — ¤ — —
365