HD6475348R Datasheet, PDF (415/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

FRC (H and L)—Free-Running Counter
H'FE92, H'FE93
Bit
7
6
5
4
3
2
1
FRT 1
0
Initial value
Read/Write
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W
Count value
OCRA (H and L)—Output Compare Register A H'FE94, H'FE95
Bit
7
6
5
4
3
2
1
FRT 1
0
Initial value
Read/Write
1
1
1
1
1
1
1
1
R/W R/W R/W R/W R/W R/W R/W R/W
Continually compared with FRC. OCFA is set to 1 when OCRA = FRC.
OCRB (H and L)—Output Compare Register B H'FE96, H'FE97
Bit
7
6
5
4
3
2
1
FRT 1
0
Initial value
Read/Write
1
1
1
1
1
1
1
1
R/W R/W R/W R/W R/W R/W R/W R/W
Continually compared with FRC. OCFB is set to 1 when OCRB = FRC.
ICR (H and L)—Input Capture Register
H'FE98, H'FE99
Bit
7
6
5
4
3
2
1
FRT 1
0
Initial value
Read/Write
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Contains FRC count captured when external input capture signal changes.
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