HD6475348R Datasheet, PDF (203/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

10.1.4 Register Configuration
Table 10-2 lists the registers of each free-running timer channel.
Table 10-2 Register Configuration
Initial
Channel Name
Abbreviation R/W Value
Timer control register
TCR
R/W H'00
Timer control/status register
TCSR
R/(W)* H'00
Free-running counter (High)
FRC (H)
R/W H'00
Free-running counter (Low)
FRC (L)
R/W H'00
1
Output compare register A (High) OCRA (H)
R/W H'FF
Output compare register A (Low) OCRA (L)
R/W H'FF
Output compare register B (High) OCRB (H)
R/W H'FF
Output compare register B (Low) OCRB (L)
R/W H'FF
Input capture register (High)
ICR (H)
R
H'00
Input capture register (Low)
ICR (L)
R
H'00
Timer control register
TCR
R/W H'00
Timer control/status register
TCSR
R/(W)* H'00
Free-running counter (High)
FRC (H)
R/W H'00
Free-running counter (Low)
FRC (L)
R/W H'00
2
Output compare register A (High) OCRA (H)
R/W H'FF
Output compare register A (Low) OCRA (L)
R/W H'FF
Output compare register B (High) OCRB (H)
R/W H'FF
Output compare register B (Low) OCRB (L)
R/W H'FF
Input capture register (High)
ICR (H)
R
H'00
Input capture register (Low)
ICR (L)
R
H'00
* Software can write a 0 to clear bits 7 to 4, but cannot write a 1 in these bits.
Address
H'FE90
H'FE91
H'FE92
H'FE93
H'FE94
H'FE95
H'FE96
H'FE97
H'FE98
H'FE99
H'FEA0
H'FEA1
H'FEA2
H'FEA3
H'FEA4
H'FEA5
H'FEA6
H'FEA7
H'FEA8
H'FEA9
186