HD6475348R Datasheet, PDF (149/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

7.3 Operation in Each Wait Mode
Table 7-2 summarizes the operation of the three wait modes.
Table 7-2 Wait Modes
Mode
Programmable
wait mode
WMS1 = 0
WMS0 = 0
Pin wait mode
WMS1 = 1
WMS0 = 0
Pin auto-wait
mode
WMS1 = 1
WMS0 = 1
WAIT
Pin Function
Disabled
Insertion
Conditions
Inserted on access to
an off-chip address
Number of Wait
States Inserted
1 to 3 wait states are inserted, as
specified by bits WC0 and WC1.
Enabled
Enabled
Inserted on access to
an off-chip address
Inserted on access to
an off-chip address if
the WAIT pin is Low
0 to 3 wait states are inserted, as
specified by bits WC0 and WC1,
plus additional wait states while the
WAIT pin is held Low.
1 to 3 wait states are inserted, as
specified by bits WC0 and WC1.
7.3.1 Programmable Wait Mode
The programmable wait mode is selected when WMS1 = 0 and WMS0 = 0.
Whenever the CPU or DTC accesses an off-chip address, the number of wait states set in bits
WC1 and WC0 are inserted. The WAIT pin is not used for wait control; it is available as an I/O
pin.
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