HD6475348R Datasheet, PDF (12/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

A.3 Operation Code Map ··········································································································379
A.4 Instruction Execution Cycles ·····························································································384
A.4.1 Calculation of Instruction Execution States ····························································384
A.4.2 Tables of Instruction Execution Cycles ··································································385
Appendix B Register Field
B.1 Register Addresses and Bit Names ····················································································393
B.2 Register Descriptions ·········································································································398
Appendix C I/O Port Schematic Diagrams
C.1 Schematic Diagram of Port 1 ·····························································································437
C.2 Schematic Diagram of Port 2 ·····························································································444
C.3 Schematic Diagram of Port 3 ·····························································································445
C.4 Schematic Diagram of Port 4 ·····························································································446
C.5 Schematic Diagram of Port 5 ·····························································································447
C.6 Schematic Diagram of Port 6 ·····························································································448
C.7 Schematic Diagram of Port 7 ·····························································································450
C.8 Schematic Diagram of Port 8 ·····························································································455
C.9 Schematic Diagram of Port 9 ·····························································································456
Appendix D Memory Maps ·······························································································463
Appendix E Pin States
E.1 Port State of Each Pin State ·······························································································465
E.2 Pin States in Reset State ·····································································································468
Appendix F Timing of Transition to and Recovery from
Hardware Standby Mode················································································475
Appendix G Package Dimensions ····················································································476