HD6475348R Datasheet, PDF (352/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Table 20-8 (1) Bus Timing (R-Mask Versions) (cont)
Condition A
Item
8 MHz
10 MHz 16 MHz
Test
Symbol Min Max Min Max Min Max Unit Conditions
Wait setup time
tWTS
40 –
40 – 40 – ns See figure 20-5
Wait hold time
tWTH 10 –
10 – 10 – ns
Bus request setup time
tBRQS 40 –
40 – 40 – ns See figure 20-10
Bus acknowledge delay time 1 tBACD1 –
70 –
60 – 55 ns
Bus acknowledge delay time 2 tBACD2 –
70 –
60 – 55 ns
Bus floating delay time
tBZD
–
tBACD1 –
tBACD1 – tBACD1 ns
E clock delay time
tED
– 20 – 15 – 15 ns See figure 20-11
E clock rise time
tEr
– 15 – 15 – 15 ns
E clock fall time
tEf
– 15 – 15 – 15 ns
Read data hold time
(E clock sync)
tRDHE 0
–
0 – 0 – ns See figure 20-6
Write data hold time
(E clock sync)
tWDHE 50 –
40 – 30 – ns
341