HD6475348R Datasheet, PDF (252/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Bit 7—Output Enable (OE): This bit enables the timer counter and the PWM output.
Bit 7
OE
0
1
Description
PWM output is disabled. TCNT is cleared to H'00 and stopped. (Initial value)
PWM output is enabled. TCNT runs.
Bit 6—Output Select (OS): This bit selects positive or negative logic for the PWM output.
Bit 6
OS
0
1
Description
Positive logic; positive-going PWM pulse, 1 = High
Negative logic; negative-going PWM pulse, 1 = Low
(Initial value)
Bits 5 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bits 2, 1, and 0—Clock Select (CKS2, CKS1, and CKS0): These bits select one of eight clock
sources obtained by dividing the system clock (ø).
Bit 2
CKS2
0
0
0
0
1
1
1
1
Bit 1
CKS1
0
0
1
1
0
0
1
1
Bit 0
CKS0
0
1
0
1
0
1
0
1
Description
ø/2 (Initial value)
ø/8
ø/32
ø/128
ø/256
ø/1024
ø/2048
ø/4096
From the clock source frequency, the resolution, period, and frequency of the PWM output can be
calculated as follows.
Resolution
= 1/clock source frequency
PWM period = resolution × 250
PWM frequency = 1/PWM period
If the ø clock frequency is 10 MHz, then the resolution, period, and frequency of the PWM output
for each clock source are given in table12-3.
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