HD6475348R Datasheet, PDF (138/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

INT
DTC
DTC interrupt?
Y
Interrupt
N
Read DTC vector
Read transfer mode
Read source address
Read data
Source address
Y
increment mode?
N
Increment source address (+1 or +2)
Write source address
Read destination address
Write data
Destination address
Y
increment mode?
N
Increment destination address
(+1 or +2)
Write destination address
Read DTCR
DTCR – 1 ^→ DTCR
Write DTCR
Y
DTCR = 0?
N
DTC END
CPU
Save PC and SR
Read vector
Read address from
vector table
Start executing
interrupt-handling
routine at that
address.
Figure 6-2 Flowchart of Data Transfer Cycle
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