HD6475348R Datasheet, PDF (240/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

11.3.4 Setting of TCNT Overflow Flag
The overflow flag (OVF) is set to 1 when the timer count overflows (changes from H'FF to H'00).
Figure 11-7 shows the timing of this operation.
ø
TCNT
H'FF
H'00
Internal overflow
signal
OVF
Figure 11-7 Setting of Overflow Flag (OVF)
11.4 CPU Interrupts and DTC Interrupts
The 8-bit timer can generate three types of interrupts: compare-match A and B (CMIA and
CMIB), and overflow (OVI). Each interrupt is requested when the corresponding enable and flag
bits are set in the TCR and TCSR. Independent signals are sent to the interrupt controller for each
type of interrupt. Table 11-3 lists information about these interrupts.
Table 11-3 8-Bit Timer Interrupts
Interrupt
CMIA
CMIB
OVI
Description
Requested when CMFA is set
Requested when CMFB is set
Requested when OVF is set
DTC Service Available?
Yes
Yes
No
Priority
High
Low
The CMIA and CMIB interrupts can be served by the data transfer controller (DTC) to have a data
transfer performed.
When the DTC serves one of these interrupts, it automatically clears the CMFA or CMFB flag
to 0. See section 6, “Data Transfer Controller” for further information on the DTC.
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