HD6475348R Datasheet, PDF (303/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Group Select
CH2
0
1
CH1
0
0
1
1
0
0
1
1
Channel Select
CH0
0
1
0
1
0
1
0
1
Selected Channels
Single Mode Scan Mode
AN0
AN0
AN1
AN0 and AN1
AN2
AN0 to AN2
AN3
AN0 to AN3
AN4
AN4
AN5
AN4 and AN5
AN6
AN4 to AN6
AN7
AN4 to AN7
15.2.3 A/D Control Register (ADCR)—H'FEE9
Bit
7
6
5
4
3
2
1
0
TRGE —
—
—
—
—
—
—
Initial value
0
1
1
1
1
1
1
1
Read/Write
R/W
—
—
—
—
—
—
—
The A/D control register (ADCR) is an 8-bit readable/writable register that enables or disables the
A/D external trigger signal.
The ADCR is initialized to H'7F at a reset and in the standby modes.
Bit 7—Trigger Enable (TRGE): This bit enables or disables the ADTRG (A/D external trigger)
signal.
Bit 7
TRGE
0
1
Description
External triggering of A/D conversion is disabled.
A High-to-Low transition of ADTRG starts A/D conversion.
(Initial value)
Bit 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
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