HD6475348R Datasheet, PDF (242/487 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

11.6 Application Notes
Application programmers should note that the following types of contention can occur in the 8-bit
timer.
Contention between TCNT Write and Clear: If an internal counter clear signal is generated
during the T3 state of a write cycle to the timer counter, the clear signal takes priority and the
write is not performed.
Figure 11-9 shows this type of contention.
Write cycle: CPU writes to TCNT
T1
T2
T3
ø
Internal Address
bus
Internal write
signal
Counter clear
signal
TCNT address
TCNT
N
H'00
Figure 11-9 TCNT Write-Clear Contention
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