TCC76 Datasheet, PDF (9/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
TABLE OF CONTENTS
Tables
Table 1.1 TCC76x Derivatives ............................................................................................... 1-1
Table 1.2 TCC760 Pin Description ........................................................................................... 1-7
Table 1.3 TCC761 Pin Description ......................................................................................... 1-11
Table 1.4 Mapping between TCC761-E and TCC761-Y...................................................... 1-15
Table 1.5 TCC763 / TCC764 Pin Description......................................................................... 1-16
Table 1.6 TCC766 Pin Description ......................................................................................... 1-20
Table 1.7 TCC767 Pin Description ......................................................................................... 1-27
Table 1.8 TCC768 Pin Description ......................................................................................... 1-33
Table 1.9 Pin Comparison – TCC763 vs. TCC768 .............................................................. 1-36
Table 2.1 Address Allocation Map of the TCC76x.................................................................. 2-1
Table 2.2 Address Allocations for Internal Peripherals (Base = 0x80000000)....................... 2-2
Table 2.3 DAI & CDIF Register Map (Base = 0x80000000) .................................................. 2-3
Table 2.4 Interrupt Controller Register Map (Base = 0x80000100) ....................................... 2-3
Table 2.5 Timer/Counter Register Map (Base = 0x80000200) .............................................. 2-4
Table 2.6 GPIO Register Map (Base = 0x80000300) ............................................................ 2-5
Table 2.7 Clock Generator Register Map (Base = 0x80000400)........................................... 2-5
Table 2.8 USB Register Map (Base = 0x80000500).............................................................. 2-6
Table 2.9 USBH Register Map (Base = 0x80000D00) .......................................................... 2-7
Table 2.10 UART/IrDA Register Map (Base = 0x80000600) ................................................. 2-8
Table 2.11 GSIO Register Map (Base = 0x80000700) .......................................................... 2-8
Table 2.12 I2C Register Map (Base Address = 0x80000800) ............................................... 2-8
Table 2.13 ECC Register Map (Base Address = 0x80000900) ............................................. 2-9
Table 2.14 ADC Interface & ETC Register Map (Base = 0x80000A00)................................. 2-9
Table 2.15 CIF Register Map (Base Address = 0x80000B00)............................................. 2-10
Table 2.16 DMA Controller Register Map (Base = 0x80000E00) ........................................ 2-10
Table 2.17 LCD Controller Register Map (Base = 0x80000F00) ......................................... 2-11
Table 2.18 Memory Controller Register Map (Base = 0xF0000000) ................................... 2-12
Table 2.19 NAND flash Register Map (Base = N * 0x10000000) ........................................ 2-12
Table 3.1 CP15 Register Map................................................................................................ 3-3
Table 4.1 DAI Register Map (Base Address = 0x80000000) ................................................. 4-4
Table 4.2 CDIF Register Map (Base Address = 0x80000080)............................................... 4-9
Table 5.1 Interrupt Controller Register Map (Base Address = 0x80000100)......................... 5-2
Table 5.2 Summary of External Interrupt Configuration......................................................... 5-4
Table 5.3 ICFG Usage for WakeUp Event ............................................................................. 5-6
Table 6.1 Timer/Counter Register Map (Base Address = 0x80000200) ................................ 6-2
Table 6.2 TC32 Count Mode .................................................................................................. 6-7
Table 7.1 GPIO Register Map (Base Address = 0x80000300) .............................................. 7-2
Table 8.1 Example of Phase for Several Target Frequencies................................................ 8-2
Table 8.2 Clock Generator Register Map (Base Address = 0x80000400)............................. 8-4
Table 9.1 USB Register Map (Base Address = 0x80000500)................................................ 9-2
Table 9.2 USB Host Register Map (Base Address = 0x80000D00)..................................... 9-15
Table 10.1 UART/IrDA Register Map (Base Address = 0x80000600) ................................. 10-2
Table 11.1 GSIO Register Map (Base Address = 0x80000700) .......................................... 11-2
Table 12.1 ADC Controller Register Map (Base Address = 0x80000A00) .......................... 12-2
Table 12.2 Miscellaneous Register Map (Base Address = 0x80000A00)............................ 12-4
Table 13.1 DMA Controller Register Map (Base Address = 0x80000E00) .......................... 13-2
Table 14.1 LCD Controller Register Map (Base Address = 0x80000F00) ......................... 14-14
Table 15.1 Memory Controller Register Map (Base Address = 0xF0000000) ..................... 15-2
Table 15.2 NAND flash Register Map (Base Address = N * 0x10000000) .......................... 15-2
Table 15.3 Page size of NAND Flash ................................................................................ 15-14
Table 16.1 ECC Register Map (Base Address = 0x80000900) ........................................... 16-2
Table 17.1 I2C Signal Mapping............................................................................................ 17-1
Table 17.2 I2C Register Map (Base Address = 0x80000800) ............................................. 17-2
Table 18.1 CIF Signal Mapping............................................................................................ 18-2
Table 18.2 CIF Register Map (Base Address = 0x80000B00)............................................. 18-5
Table 19.1 Register of Fast GPIO ......................................................................................... 19-1
Preliminary
ix