TCC76 Datasheet, PDF (125/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
USB CONTROLLER
Function Address Register (UBFADR)
0X80000500
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
UP
FADR
UP [7]
Function Address Update
UP = 0
Function address doesn’t be updated
UP = 1
Function address can be updated with FADR
* The MCU sets this bit whenever it updates the FADR field. This bit is write only
register.
FADR
[6:0]
n
Function Address
Function address
This register maintains the USB Device Address assigned by the host. The control
program should write the value received through a SET_ADDRESS descriptor from host
to this register. The address is used for the next token. The UP bit field should be set
whenever the FADR field is written. The FADR field is used after the Status phase of a
Control transfer, which is signaled by the clearing of the DEND bit in the CSR registers.
Power Management Register (UBPWR)
15 14 13 12 11 10 9 8 7 6 5 4
Reserved
ISOUP Reserved
0x80000504
3210
URST RSM SP ENSP
ISOUP [7]
1
Type
R/W
ISO Update
Valid in ISO Mode only. If set, IRDY(IN Packet
Ready) is set after a SOF token is received. If an IN
token is received before a SOF token, then a zero length
data packet will be sent to the host.
URST [3] Type
USB Reset
1
R Indicates reset signaling is received from the host.
RSM [2]
1
0
Type
R/W
Resume Signal
Generate a resume signaling (DP is low, DN is high).
Stop generating a resume signaling.
SP [1]
1
Type
Suspend Mode
R Indicates that the USB enters suspend mode
ENSP [0]
0
1
Type
Enable Suspend Mode
R/W
Disable Suspend Mode
Enable Suspend Mode
This register is used for suspend, resume signaling. If ENSP filed is zero, the device will
not enter suspend mode. If ENSP is 1 and there are no signals during 3ms, the USB enters
suspend mode and the SP bit field is set to 1. It is cleared if USB receives resume or reset
signal from host. The USB can also generate a resume signaling by setting RSM bit to 1.
Preliminary
9-3