TCC76 Datasheet, PDF (55/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
ADDRESS & REGISTER MAP
2 ADDRESS & REGISTER MAP
2.1 Address Map
The TCC76x has fixed address maps for digital audio en-decoder system. The address space is separated MSB
4bits of address bus, the following table represents overall address space of TCC76x system.
Address Space
0x00000000 ~ 0x0FFFFFFF
0x10000000 ~ 0x1FFFFFFF
0x20000000 ~ 0x2FFFFFFF
0x30000000 ~ 0x3FFFFFFF
0x40000000 ~ 0x4FFFFFFF
0x50000000 ~ 0x5FFFFFFF
0x60000000 ~ 0x6FFFFFFF
0x70000000 ~ 0x7FFFFFFF
0x80000000 ~ 0x8FFFFFFF
0x90000000 ~ 0x9FFFFFFF
0xA0000000 ~ 0xAFFFFFFF
0xB0000000 ~ 0xBFFFFFFF
0xC0000000 ~ 0xCFFFFFFF
0xD0000000 ~ 0xDFFFFFFF
0xE0000000 ~ 0xEFFFFFFF
0xF0000000 ~ 0xFFFFFFFF
Table 2.1 Address Allocation Map of the TCC76x
Device Name
1) if Remap is 0, External ROM of chip select 3 or internal ROM.
2) if Remap is 1, Other type memory according to base value.
3) if any other type of memory is not assigned to this area, then
Internal SRAM is assigned.
Not Used
Assigned to SDRAM initially.
Assigned to internal SRAM
Assigned to chip select 0
Initially the configuration register is set to SRAM
Assigned to chip select 1
Initially the configuration register is set to IDE type device
Assigned to chip select 2
Initially the configuration register is set to NAND flash
Assigned to chip select 3
Initially the configuration register is set to ROM
Various internal peripheral devices
Not Used
Assigned to internal boot ROM
Assigned to memory controller configuration register space
The address space (0x00000000 ~ 0x0FFFFFFF) is initially allocated to internal or external PROM for booting
procedure, and a special flag exists in memory controller unit for remapping this space to other type of memories.
That is, if the remap flag is set to 1, this space is released from the external ROM of chip select 3 or internal boot
ROM. Refer to the description of memory controller for detailed operation.
The TCC76x has one chip select for SDRAM, and four chip selects for other type of memories. Their address
space is dependent on the configuration registers for each chip selects. The above address map is only at the
initial state of the TCC76x; these maps can be changed at user requests.
The TCC76x has various peripherals for controlling a digital audio en-decoder system. These peripherals can be
configured appropriately by it’s own registers that can be accessed through specially allocated address. These
address maps are represented in the following table. In case of memory controller, its space is separated for
preventing illegal accessing.
Refer to corresponding sections for detail information of each peripheral.
Preliminary
2-1