TCC76 Datasheet, PDF (66/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
ADDRESS & REGISTER MAP
Table 2.18 Memory Controller Register Map (Base = 0xF0000000)
Name
Address Type Reset Description
SDCFG
0x00
R/W 0x62E97010 SDRAM Configuration Register
SDFSM
0x04
R
-
SDRAM FSM Status Register
MCFG
0x08
R/W 0xZZZZ_02 Miscellaneous Configuration Register
TST
0x0C
W
0x00000000 Test mode register (must be remained zero)
CSCFG0
CSCFG1
CSCFG2
CSCFG3
0x10
0x14
0x18
0x1C
R/W
0x0B405649
External Chip Select 0 Configuration Register
(Initially set to SRAM)
R/W
0x0150569A
External Chip Select 1 Configuration Register
(Initially set to IDE)
R/W
0x006056BA
External Chip Select 2 Configuration Register (Initially
set to NAND)
R/W
0x0A70569A
External Chip Select 3 Configuration Register
(Initially set to NOR)
CLKCFG
0x20
R/W 0xXXXXXX00 Memory Controller Clock Count Register
SDCMD
0x24
W
-
SDRAM Command Register
Z means that it is determined by the status of some external pins.
Table 2.19 NAND flash Register Map (Base = N * 0x10000000)
Name
Address Type Reset Description
NDCMD
0x00
R/W Unknown Command Cycle Register
NDLADR
0x04
W
-
Linear Address Cycle Register
NDBADR
0x08
W
-
Block Address Cycle Register
NDIADR
0x0C
W
-
Single Address Cycle Register
NDDATA
0x10
R/W Unknown Data Access Cycle Register
N represents BASE field of CSCFGn registers that is configured as NAND flash chip select.
Preliminary
2-12