TCC76 Datasheet, PDF (31/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTRODUCTION
Signal Name Shared Signal
USB_DP
USB_DN
USBH_DP
USBH_DN
UT_TX
UT_RX
GPIO_B[26]
GPIO_B[27]
GPIO_B[28]
GPIO_B[29]
GPIO_B[8] / SD_nCS
GPIO_B[9]
BCLK
LRCK
MCLK
DAO
DAI
ADCDAT
LCH_OUT
RCH_OUT
LOUT
ROUT
RCH_IN
MIC_IN
LCH_IN
VMID
MICBIAS
WMODE
SDIN
SCLK
CBCLK
CLRCK
CDAI
EXINT[3]
EXINT[2]
EXINT[1]
EXINT[0]
GPIO_B[21] / BM[0]
GPIO_B[22] / BM[1]
GPIO_B[23]
GPIO_B[24] / BM[2]
GPIO_B[25]
CSB
GPIO_A[8] / BW[0]
GPIO_A[9] / BW[1]
GPIO_A[1]
GPIO_A[2]
GPIO_A[3]
GPIO_A[15]
GPIO_A[14] / FGPIO[14]
GPIO_A[13] / FGPIO[13]
GPIO_A[12] / FGPIO[12]
GPIO_A[15]
GPIO_A[14]
GPIO_A[13]
GPIO_A[12]
GPIO_A[11]
GPIO_A[10]
EXINT[3]
EXINT[2] / FGPIO[14]
EXINT[1] / FGPIO[13]
TESTIRQ
SDI2 / FGPIO[11] / SCL
FRM2 / FGPIO[10] / SDA
GPIO_A[9] / BW[1] SCLK
Ball
P9
T8
R10
N10
M11
N11
N12
L14
N6
M14
M13
K14
H15
G15
C10
C8
F1
A3
G4
A4
C6
H1
E7
B4
E11
E10
D9
D4
A1
B2
E6
D4
A1
B2
E6
C7
F8
B4
Type Description – TCC766
USB/UART/IrDA Interface Pins
I/O USB Function D+ signal / GPIO_B[26]
I/O USB Function D- signal / GPIO_B[27]
I/O USB Host D+ signal / GPIO_B[28]
I/O USB Host D- signal / GPIO_B[29]
I/O
UART or IrDA TX data / GPIO_B[8] / DDR SDRAM Chip
Select
I/O UART or IrDA RX data / GPIO_B[9]
Audio Interface Pins
I/O
I2S Bit Clock / GPIO_B[21]
Internal pull-down resistor is active at power up.
I/O
I2S Word Clock / GPIO_B[22]
Internal pull-down resistor is active at power up.
I/O I2S System Clock
I/O I2S Digital Audio data Output
I/O
I2S Digital Audio data Input / GPIO_B[25] must be
connected externally to ADCDAT
O
I2S digital audio data output of audio CODEC(ADC) must
be connected externally to GPIO_B[25] (DAI)
AO DAC Left Channel Output of audio CODEC
AO DAC Right Channel Output of audio CODEC
AO DAC Left Channel Line Output of audio CODEC
AO DAC Right Channel Line Output of audio CODEC
AI ADC Right Channel Input of audio CODEC
AI Microphone Input of audio CODEC
AI ADC Left Channel Input of internal audio CODEC
AO Mid-rail reference decoupling point
AO Microphone Bias
CODEC I/F Control. To enable 2-wire serial interface ot the
I internal CODEC, low level must be maintained. This pin
has an internal pull-up resistor.
I 2-Wire MCU Data Input for CODEC
I 2-Wire MCU Clock Input for CODEC
CD DSP Interface Pins
I/O CD Data Bit Clock Input / GPIO_A[1]
I/O CD Data Word Clock Input / GPIO_A[2]
I/O CD Data Input / GPIO_A[3]
External Interrupt Pins
I/O External Interrupt Request [3] / GPIO_A[15]
I/O External Interrupt Request [2] / GPIO_A[14] / FGPIO[14]
I/O External Interrupt Request [1] / GPIO_A[13] / FGPIO[13]
External Interrupt Request [0] / GPIO_A[12] / FGPIO[12]. This pin
I/O is internally connected to the USB2.0 module. Do not use for
external component.
General Purpose I/O Pins
I/O GPIO_A[15] / External Interrupt Request 3
I/O GPIO_A[14] / External Interrupt Request 2 / Fast GPIO bit 14
I/O GPIO_A[13] / External Interrupt Request 1 / Fast GPIO bit 13
GPIO_A[12] / External Interrupt Request 0 / Fast GPIO bit 12. This
I/O pin is internally connected to the USB2.0 module. Do not use for
external component.
I/O GPIO_A[11] / GSIO2 Data In / Fast GPIO bit 11 / I2C Clock.
I/O GPIO_A[10] / GSIO2 FRM / Fast GPIO bit 10 / I2C Data Line.
GPIO_A[9] / Bus Width bit 1. The status of BW[1:0] is latched at the
I/O
rising edge of nRESET and used to determine external bus width.
Refer to section “MEMORY CONTROLLER” for BW[1:0]
description.
Preliminary
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