TCC76 Datasheet, PDF (77/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
DAI & CDIF
BM [10]
0
1
DAI Bit Clock Master Select
Set that DAI bit clock is come from external pin
Set that DAI bit clock is generated by dividing DAI system clock
FM [9]
0
1
DAI Frame Clock Master Select
Set that DAI frame clock is come from external pin
Set that DAI frame clock is generated by dividing DAI bit clock
CC [8]
0
1
CDIF Clock Select
Disable CDIF Clock master mode
Enable CDIF Clock master mode
BD [7:6]
00
01
10
11
DAI Bit Clock Divider select
Select Div 4 ( 256fs->64fs )
Select Div 6 ( 384fs->64fs )
Select Div 8 ( 512fs->64fs, 384fs->48fs , 256fs->32fs)
Select Div16 ( 512fs->32fs )
FD [5:4]
DAI Frame Clock Divider select
00
Select Div 32 ( 32fs->fs )
01
Select Div 48 ( 48fs->fs )
10
Select Div 64 ( 64fs->fs )
The combination of BD & FD determines that the ratio between main system clock and
the sampling frequency. The multiplication between the division factor of BD and FD
must be equal to this ratio.
BP [3]
0
1
DAI Bit Clock Polarity
Set that data is captured at positive edge of bit clock
Set that data is captured at negative edge of bit clock
CM [2]
0
1
CDIF Monitor Mode
Disable CDIF monitor mode
Enable CDIF monitor mode. Data bypass from CDIF
MM [1]
0
1
DAI Monitor Mode
Disable DAI monitor mode
Enable DAI monitor mode. Transmitter should be enabled. (TE = 1)
LB [0]
0
1
DAI Loop-back Mode
Disable DAI Loop back mode
Enable DAI Loop back mode
Digital Audio Volume Control Register (DAVC)
0x80000044
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
VC<3:0>
The volume of audio output can be manipulated by this register. It has –6dB unit so the output
Preliminary
4-5