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TCC76 Datasheet, PDF (159/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player
TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
MISCELLANEOUS PERIPHERALS
Buffer Drive Strength Select BH (CFGDRVBH)
0x80000A3C
Bit
Name R/W Reset Description
31:0 CFGDRVBH R/W 0x00000000 Buffer Drive Strength Select for GPIO_B pins.
Buffer Drive Strength Select CL (CFGDRVCL)
0x80000A40
Bit
Name R/W Reset Description
31:0 CFGDRVCL R/W 0x00000000 Buffer Drive Strength Select for GPIO_C pins.
Buffer Drive Strength Select CH (CFGDRVCH)
0x80000A44
Bit
Name R/W Reset Description
31:0 CFGDRVCH R/W 0x00000000 Buffer Drive Strength Select for GPIO_C pins.
Buffer Drive Strength Select DL (CFGDRVDL)
0x80000A48
Bit
Name R/W Reset Description
31:0 CFGDRVDL R/W 0x00000000 Buffer Drive Strength Select for GPIO_D pins.
Buffer Drive Strength Select DH (CFGDRVDH)
0x80000A4C
Bit
Name R/W Reset Description
31:0 CFGDRVDH R/W 0x00000000 Buffer Drive Strength Select for GPIO_D pins.
Buffer Drive Strength Select XL (CFGDRVXL)
0x80000A50
Bit
Name
R/W Reset Description
31:28 Reserved
R/W
0x0
Reserved
27
XDL
R/W
0
Buffer Drive Strength Select for XD[15:0] pins
26
CLKL
R/W
0
Buffer Drive Strength Select for SD_CLK pin
25
OEL
R/W
1
Buffer Drive Strength Select for nOE pin
24
WEL
R/W
1
Buffer Drive Strength Select for nWE pin
23:0
XAL
R/W 0xFFFFFF Buffer Drive Strength Select for XA[23:0] pins.
Buffer Drive Strength Select XH (CFGDRVXH)
0x80000A54
Bit
Name
R/W Reset Description
31:28 Reserved
R/W
0x0
27
XDH
R/W
0
Buffer Drive Strength Select for XD[15:0] pins
26
CLKH
R/W
1
Buffer Drive Strength Select for SD_CLK pin
25
OEH
R/W
0
Buffer Drive Strength Select for nOE pin
24
WEH
R/W
0
Buffer Drive Strength Select for nWE pin
23:0
XAH
R/W 0x000000 Buffer Drive Strength Select for XA[23:0] pins.
System Configuration (CFGSYS)
Bit
Name R/W Reset
31:17 Reserved R/W 0x00000000
16 CFGRSPERR R/W
0
15:0 Reserved R/W
0x0000
Description
0x80000A60
Error Response Enable. When enabled, ABORT is asserted to
the CPU if undefined addresses are accessed.
Reserved for test. Must be written as zero.
Preliminary
12-7