TCC76 Datasheet, PDF (204/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
MEMORY CONTROLLER
Memory Controller Clock Count Register (CLKCFG)
0xF0000020
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
CNT[2:0]
CNT [2:0]
N
Count Select for Clock Gating
The internal clock of the Memory Controller can be gated to save
power. These bits selects the clock gating ratio. The timing
parameters of CSCFGx registers should be re-written with
appropriate values. These bits also affect the SD_CLK output.
Do not enable this feature when DDR SDRAM is used.
SEL[2:0] SD_CLK and Internal Clock
1
HCLK / 2
2
HCLK / 4
3
HCLK / 6
SDRAM Command Register (SDCMD)
0xF0000024
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
A10
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
nCS nRAS nCAS nWE BA[1:0]
A[9:0]
When this register is written, corresponding SDRAM signal is output to the SDRAM.
This is a write only register and read data is undefined. Any value written to this
register must be a valid SDRAM command (MRS or EMRS, etc).
Preliminary
15-12