TCC76 Datasheet, PDF (21/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTRODUCTION
1.4.2 TCC761 Pin Description
Signal Name
SD_CKE
SD_CLK
SD_nCS
XA[23:22]
XA[21:20]
XA[19:18]
XA[17]
XA[16]
XA[15]
XA[14]
XA[13]
XA[12:7]
XA[6:0]
XD[15:9]
XD[8:4]
XD[3:0]
XD[31:24]
XD[23:16]
NCS[3:0]
IDE_nCS1
ND_nWE
nWE
nOE
READY
USB_DP
USB_DN
USBH_DP
USBH_DN
UT_TX
UT_RX
BCLK
LRCK
MCLK
DAO
DAI
CBCLK
Shared Signal
GPIO_B[0]
GPO
SD_nCLK / GPIO_B[1]
DQM[0:1]
DQM[2:3]
DQS[1:0]
ND_CLE
SD_nRAS / ND_ALE
SD_nCAS
SD_BA[1]
SD_BA[0]
GPIO_C[15:8]
GPIO_C[7:0],
ND_nOE[3:0] / GPIO_B[5:2]
GPIO_B[6]
GPIO_B[7]
GPIO_B[26]
GPIO_B[27]
GPIO_B[28]
GPIO_B[29]
GPIO_B[8] / SD_nCS
GPIO_B[9] / IDE_nCS1
GPIO_B[21]
GPIO_B[22]
GPIO_B[23]
GPIO_B[24]
GPIO_B[25]
GPIO_B[14]
Table 1.3 TCC761 Pin Description
Pin # Type Description – TCC761
External Memory Interface Pins
95
I/O SDRAM Clock Enable signal. Active high. / GPIO_B[0]
SDRAM Clock / GPO. SD_CLK can be used as a general
77
I/O purpose output. Refer to section “MEMORY CONTROLLER”.
(MCFG register Bit[3] and Bit[1])
Chip select signal for SDRAM, Active low / Inverted SD_CLK for
80
I/O
DDR SDRAM / GPIO_B[1]
68:67 I/O External Bus Address Bits [23:22] / Data I/O Mask [0:1]
66:65 I/O External Bus Address Bits [21:20] / Data I/O Mask [2:3]
61:60 I/O External Bus Address Bit [19:18] / DDR SDRAM Data Strobe [1:0]
59
I/O External Bus Address Bit [17] / CLE for NAND Flash
External Bus Address Bit [16] / SDRAM RAS signal / ALE
58
I/O
for NAND Flash
57
I/O External Bus Address Bit [15] / SDRAM CAS signal
56
I/O External Bus Address Bit [14] / SDRAM Bank Address 1
55
I/O External Bus Address Bit [13] / SDRAM Bank Address 0.
50:45
38:32
I/O External Bus Address Bits [12:0]
20:14,
7:3,
I/O External Bus Data Bit [15:0]
208:205
76:69
31:24
I/O External Bus Data Bits [31:16] / GPIO_C[15:0]
84:81
External Bus Chip Select [3:0] / NAND Flash Output Enable
I/O
[3:0] / GPIO_B[5:2]
94
I/O IDE chip select 1. Active low. / GPIO_B[6]
96
I/O NAND flash WE. Active low. / GPIO_B[7]
97
I/O Static Memory Write Enable signal. Active low.
98
I/O Static Memory Output Enable signal. Active low.
118
I Ready information from external device.
USB/UART/IrDA Interface Pins
88
I/O USB Function D+ signal / GPIO_B[26]
89
I/O USB Function D- signal / GPIO_B[27]
90
I/O USB Host D+ signal / GPIO_B[28]
91
I/O USB Host D- signal / GPIO_B[29]
UART or IrDA TX data / GPIO_B[8] / DDR SDRAM Chip
99
I/O
Select
100
I/O UART or IrDA RX data / GPIO_B[9] / IDE Chip Select 1
Audio Interface Pins
101
I/O I2S Bit Clock / GPIO_B[21] / Boot Mode Bit 0
102
I/O I2S Word Clock / GPIO_B[22] / Boot Mode Bit 1
107
I/O I2S System Clock / GPIO_B[23]
I2S Digital Audio data Output / GPIO_B[24] / Boot Mode
108
I/O
Bit 2
109
I/O I2S Digital Audio data Input / GPIO_B[25]
CD DSP Interface Pins
85
I/O CD Data Bit Clock Input / GPIO_B[14]
Preliminary
1-11