TCC76 Datasheet, PDF (126/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
USB CONTROLLER
Endpoint Interrupt Flag Register (UBEIR)
0x80000508
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
EP2 EP1 EP0
EP2 [2]
1
Type
R
W
EP2 Interrupt Flag
Indicates that the USB EP2 interrupt has been generated
Clear the EP2 interrupt flag.
EP1 [1]
1
Type
R
W
EP1 Interrupt Flag
Indicates that the USB EP1 interrupt has been generated
Clear the EP1 interrupt flag.
EP0 [0]
1
Type
R
W
EP0 Interrupt Flag
Indicates that the USB EP0 interrupt has been generated
Clear the EP0 interrupt flag.
USB Interrupt Flag Register (UBIR)
0x80000518
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
RST RSM SP
RST [2]
1
Type
R
W
Reset Interrupt Flag
Indicates that the USB has received reset signaling (DP,
DN is low during more than 10ms)
Clear the Reset interrupt flag.
RSM [1]
1
Type
R
W
Resume Interrupt Flag
Indicates that the USB has received resume signaling
(DP is low, DN is high during 10ms ~ 15ms) in suspend
mode
Clear the Resume interrupt flag.
SP [0]
1
Type
R
W
Suspend Interrupt Flag
Indicates that the USB has received suspend signalizing
Suspend signal is implicit signal that is generated if there
is no activity for 3ms.
Clear the Suspend interrupt flag.
The suspend interrupt is generated when the USB receives suspend signaling. The SP
bit field of the UBIR is set whenever there is no activity for 3ms on the bus. This
interrupt is disabled in default. The resume interrupt is generated by a USB when it
receives resume signaling in suspend mode. The USB reset interrupt is generated when
USB controller receives the reset signaling from the host.
The USB controller has two interrupt registers:
UBEIR
UBIR
Endpoint interrupt register
USB interrupt register
Preliminary
9-4