TCC76 Datasheet, PDF (34/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTRODUCTION
Signal Name Shared Signal
MST[2]
MST[1]
MST[0]
ND_D[15]
ND_D[14]
ND_D[13]
ND_D[12]
ND_D[11]
ND_D[10]
ND_D[9]
ND_D[8]
ND_D[7]
ND_D[6]
ND_D[5]
ND_D[4]
ND_D[3]
ND_D[2]
ND_D[1]
ND_D[0]
ND_nCE[1]
ND_nCE[0]
ND_ALE
ND_CLE
ND_nOE
ND_nWE
ND_nWP
ND_RDY
ND_WP_CTL
PRTST
AGN_nRESET
ACT_nSPND
ACS_IND
U_CF
U_nRESET
U_nEA
U_nTEST
TESTCS2
TESTCS0
GPIO_B[4]
GPIO_B[2]
Ball
P10
T9
T10
C16
D15
D16
E16
E15
F15
F14
F16
T16
P15
R15
T14
R14
T15
R13
P13
R3
R2
R11
R12
P11
T11
P12
T12
A12
K1
M15
M16
N1
J16
B15
L15
C13
R7
P6
Type Description – TCC766
Memory Card Configuration Select Bit 2
MST[2:0] Configuration
111
Record in flash memory by AP
001 Only support MMC/SD card
I/O
010 Only support MS/MS_Pro/New MS card
011 Support two kinds of card above. And
MMC/SD is the first slot in USB mode.
100 Support two kinds of card above. And
MS/MS_Pro/New MS card is the first slot in
USB mode.
I/O Memory Card Configuration Select Bit 1
I/O Memory Card Configuration Select Bit 0
Flash Memory Interface Pins
I/O Flash Data Bus Bit 15
I/O Flash Data Bus Bit 14
I/O Flash Data Bus Bit 13
I/O Flash Data Bus Bit 12
I/O Flash Data Bus Bit 11
I/O Flash Data Bus Bit 10
I/O Flash Data Bus Bit 9
I/O Flash Data Bus Bit 8
I/O Flash Data Bus Bit 7
I/O Flash Data Bus Bit 6
I/O Flash Data Bus Bit 5
I/O Flash Data Bus Bit 4
I/O Flash Data Bus Bit 3
I/O Flash Data Bus Bit 2
I/O Flash Data Bus Bit 1
I/O Flash Data Bus Bit 0
I/O Flash Chip Enable 1, Low active.
I/O Flash Chip Enable 0, Low active.
O Flash Address Latch Enable, High active.
O Flash Command Latch Enable, High active.
O Flash Read Control signal, Low active.
O Flash Write Control signal, Low active.
I/O Flash Write Protect Control signal, Low active.
I Flash Ready/Busy signal. Pull-up resistor required.
I/O
Flash Write Protect Control Enable Input. ND_nWP
signal output is enabled when this signal is high.
NAND Flash low level format control signal with internal
I/O pull-up. Pull-up for normal operation (low level format
disabled).
I/O Active low reset signal to AGAND Flash.
Miscellaneous Pins
Power Control Status Output. High indicates power on
I/O state (Access Mode), low indicates power off state
(Suspend Mode).
I/O
Flash Memory Access Indicator with internal pull-up. This
signal will be blinking when Flash Memory is accessed.
I
Internal IDE Mode Select Signal. For normal operation,
connect this signal to GPIO_A[5].
I Reset Signal
I EAMODE Select for Test. Pull-up for normal operation.
I Test Mode. (active low). Pull-up for normal operation.
Chip Select 2 for the internal IDE interface. This signal is
I/O internally connected to GPIO_B[4]. Do not connect to
external component.
Chip Select 1 for the internal IDE interface. This signal is
I/O internally connected to GPIO_B[2]. Do not connect to
external component.
Preliminary
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