TCC76 Datasheet, PDF (143/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
UART/IRDA
UART/IrDA Control Register (UTCR)
0x8000060C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
NO BK TF RF FIFO
PR
ST 0
NO [9]
0
1
Type
R/W
Start Bit Width Check
Check if the pulse width of start bit is more than 0.5 bit
duration of baud rate
Don’t check the pulse width of start bit (test or boot
mode only)
BK [8]
0
1
Type
R/W
Break Control Bit
Normal operation
Bit ‘0’ is transmitted regardless of THR
TF [7]
1
Type
R/W
Reset Transmitter FIFO
The transmitter FIFO is cleared
RF [6]
1
Type
R/W
Reset Receiver FIFO
The receiver FIFO is cleared
FIFO [5:4] Type
n
R/W
RX FIFO Level Select
0 = 1byte FIFO, 1 = 2 byte FIFO
2 = 4 byte FIFO, 3 = 7 byte FIFO
If this field is set to 1, it means that the RDA flag or interrupt is influenced when the
number of received data in the RX FIFO is 2. It is recommended that this field is set to 0,
so right after reception of some data, the RDA flag or interrupt can be generated.
PR [3:2]
0
1
2, 3
Type
R/W
Parity Bit Select
Even parity
Odd parity
Parity is disabled
ST [1]
0
1
Type
R/W
Stop Bit
1 Stop bit
2 Stop bit
Preliminary
10-5