TCC76 Datasheet, PDF (215/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
CAMERA INTERFACE
18 CAMERA INTERFACE
18.1 Overview
The TCC76x provides Camera Interface (CIF). The features of CIF are
Various formats timings are supported.
CCIR 601/656 4:4:4, 4:2:2, 4:2:0 YCbCr(YUV/RGB)
Bayer RGB, 555RGB, 565RGB (16/8 bits bus)
Data Packing from each channel data
DMA transfer with programmable burst count (1, 2, 4, 8 bursts)
32 depths, 32 bits FIFO
The following parameters can be programmed.
The input format of image
The horizontal and vertical size of image
The packing method of the each channel data
The following figure shows the block diagram of Camera Interface.
Camera
Interface
Data[7:0]
HS
VS
cmosif_
onoff
cmosif_
cmosif_
separator dispatcher
cmosif_
macro
Y_FIFO
U_FIFO
V_FIFO
cmosif_
dma
CAM
CLK
Iclk
Hclk
Pclk
cmosif_
clkctrl
cmosif_
reg
Camera Interface
ICLK _{cmosif_}
clkctrl
CAMCLK (out)
pi_ICLK (in)
INTCLK
INTCLK / CAMCLK
(GPIO_D[15], bidir)
CLK_
CTRL
Figure 18.1 CIF Block Diagram
The input data can be optionally separated into three color components. Each channel composes
of 8 bits and can be packed up to 32 bits. The packing sequence starts from LSB and the results
are stored to the FIFOs. The data stored in the FIFOs are transferred to memory by its own DMA
master controller. 1, 2, 4 and 8 burst transfer are supported by DMA master.
Preliminary
18-1