TCC76 Datasheet, PDF (27/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTRODUCTION
Signal Name Shared Signal
BCLK
GPIO_B[21] / BM[0]
LRCK
MCLK
DAO
DAI
ADCDAT
LCH_OUT
RCH_OUT
LOUT
ROUT
RCH_IN
MIC_IN
LCH_IN
VMID
MICBIAS
WMODE
SDIN
SCLK
GPIO_B[22] / BM[1]
GPIO_B[23]
GPIO_B[24] / BM[2]
GPIO_B[25]
CSB
GPIO_A[8] / BW[0]
GPIO_A[9] / BW[1]
CBCLK
CLRCK
CDAI
GPIO_A[1]
GPIO_A[2]
GPIO_A[3]
EXINT[3]
EXINT[2:0]
GPIO_A15
GPIO_A14 / FGPIO[14]
GPIO_A13 / FGPIO[13]
GPIO_A12 / FGPIO[12]
GPIO_A[15]
GPIO_A[14:12]
EXINT[3]
EXINT[2:0] / FGPIO[14:12]
GPIO_A[11]
GPIO_A[10]
GPIO_A[9] / BW[1]
GPIO_A[8] / BW[0]
SDI2 / FGPIO[11] / SCL
FRM2 / FGPIO[10] / SDA
SCK2 / FGPIO[9] / SCL
SDO2 / FGPIO[8] / SDA
GPIO_A[7:4]
GPIO_A[3:1]
SDI1 / FGPIO[7]
FRM1 / FGPIO[6]
SCK1 / FGPIO[5]
SDO1 / FGPIO[4]
SDI0 / CDAI / FGPIO[3]
FRM0 / CLRCK / FGPIO[2]
SCK0 / CBCLK / FGPIO[1]
Ball
J9
L11
K12
K11
K10
H10
E11
E12
B9
A8
F1
A4
F2
B5
D5
F3
D6
E7
D9
E9
E8
A2
D3
B3
C3
A2
D3
B3
C3
E4
E6
E7
D6
B6
C6
B7
B8
E8
E9
D9
Type Description – TCC763/ TCC764
I2S Bit Clock / GPIO_B[21] / Boot Mode Bit 0.
I/O
Internal pull-down resistor is active at power up.
I2S Word Clock / GPIO_B[22] / Boot Mode Bit 1
I/O
Internal pull-down resistor is active at power up.
I/O I2S System Clock / GPIO_B[23]
I2S Digital Audio data Output / GPIO_B[24] / Boot Mode
I/O
Bit 2
I/O I2S Digital Audio data Input / GPIO_B[25]
I2S Digital Audio data Output of audio CODEC(ADC).
O
Must be connected externally to GPIO_B25 (DAI)
AO DAC Left Channel Output of audio CODEC
AO DAC Right Channel Output of audio CODEC
AO DAC Left Channel Line Output of audio CODEC
AO DAC Right Channel Line Output of audio CODEC
AI ADC Right Channel Input of audio CODEC
AI Microphone Input of audio CODEC
AI ADC Left Channel Input of internal audio CODEC
AO Mid-rail reference decoupling point
AO Microphone Bias
CODEC I/F Control. Pull-down for normal operation.
I
Internal pull-up resistor is active at power up.
I/O 2-Wire MCU Data Input for CODEC
I/O 2-Wire MCU Clock Input for CODEC
CD DSP Interface Pins
I/O CD Data Bit Clock Input / GPIO_A[1]
I/O CD Data Word Clock Input / GPIO_A[2]
I/O CD Data Input / GPIO_A[3]
External Interrupt Pins
I/O External Interrupt Request [3] / GPIO_A[15]
I/O External Interrupt Request [2:0] / GPIO_A[14:12] / FGPIO[14:12]
General Purpose I/O Pins
I/O GPIO_A[15] / External Interrupt Request 3
I/O GPIO_A[15:12] / External Interrupt 3 ~ 0 / Fast GPIO bits 14 ~ 12
GPIO_A[11:8] / Bus Width bits 1 ~ 0 / General Purpose Serial I/O 2
Fast GPIO bits 11 ~ 8 / I2C signals.
The status of BW[1:0] is latched at the rising edge of nRESET and
I/O used to determine external bus width. Refer to section “MEMORY
CONTROLLER” for BW[1:0] description.
GPIO_A[9:8] is internally connected with audio CODEC signals.
Refer to Figure 1.3 for more information.
I/O GPIO_A[7:4] / General Purpose Serial I/O 1 / Fast GPIO bits 7 ~ 4
GPIO_A[3:1] / General Purpose Serial I/O 0 / CD Interface Signals /
I/O
Fast GPIO bits 3 ~ 1
Preliminary
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