TCC76 Datasheet, PDF (76/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
DAI & CDIF
4.2 Register Description - DAI
Table 4.1 DAI Register Map (Base Address = 0x80000000)
Name
Address Type Reset
Description
DADI_L0
0x00
R
-
Digital Audio Left Input Register 0
DADI_R0
0x04
R
-
Digital Audio Right Input Register 0
DADI_L1
0x08
R
-
Digital Audio Left Input Register 1
DADI_R1
0x0C
R
-
Digital Audio Right Input Register 1
DADI_L2
0x10
R
-
Digital Audio Right Input Register 2
DADI_R2
0x14
R
-
Digital Audio Right Input Register 2
DADI_L3
0x18
R
-
Digital Audio Right Input Register 3
DADI_R3
0x1C
R
-
Digital Audio Right Input Register 3
DADO_L0
0x20
R/W
-
Digital Audio Left Output Register 0
DADO_R0
0x24
R/W
-
Digital Audio Right Output Register 0
DADO_L1
0x28
R/W
-
Digital Audio Left Output Register 1
DADO_R1
0x2C R/W
-
Digital Audio Right Output Register 1
DADO_L2
0x30
R/W
-
Digital Audio Left Output Register 2
DADO_R2
0x34
R/W
-
Digital Audio Right Output Register 2
DADO_L3
0x38
R/W
-
Digital Audio Left Output Register 3
DADO_R3
0x3C R/W
-
Digital Audio Right Output Register 3
DAMR
0x40
R/W 0x0000 Digital Audio Mode Register
DAVC
0x44
R/W 0x0000 Digital Audio Volume Control Register
Digital Audio Mode Register (DAMR)
0x80000040
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EN TE RE MD SM BM FM CC BD<1:0> FD<1:0> BP CM MM LB
EN [15]
0
1
DAI Master Enable
Disable DAI module
Enable DAI module
TE [14]
0
1
DAI Transmitter Enable
Disable DAI transmitter
Enable DAI transmitter
RE [13]
0
1
DAI Receiver Enable
Disable DAI receiver
Enable DAI receiver
MD [12]
0
1
DAI Bus Mode
Set DAI bus as IIS bus mode
Set DAI bus as MSB justified mode
SM [11]
DAI System Clock Master Select
0
Set that DAI system clock is come from external pin
1
Set that DAI system clock is generated by the clock generator block
The DAI system clock in clock generator is known as DCLK. It’s frequency can be
determined by setting DCLKmode register.
Preliminary
4-4