TCC76 Datasheet, PDF (141/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
UART/IRDA
Receiver Buffer Register (UTRXD)
31 30 29 28 27 26 25
15 14 13 12 11 10 9
0
24 23
0
87
0x80000600
22 21 20 19 18 17 16
6543210
Received Data (when reading)
Whenever FRX flag of IR register is set, or RA flag of LSR register is set, reading of this
register gets the 1 byte of received data.
Transmitter Holding Register (UTTXD)
31 30 29 28 27 26 25 24 23
0
15 14 13 12 11 10 9 8 7
0
0x80000600
22 21 20 19 18 17 16
6543210
Transmitting Data (when writing)
When the transmission FIFO is not full, writing of this register fills that data to
transmission FIFO. Checking TF flag of LSR register can monitor the status of a
transmission FIFO.
Divisor Latch Register (UTDL)
0x80000604
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Divisor Latch Value
This is for generation of the desired baud rate clock. This register is set to 0 at reset,
UART is disabled until this register is set by non-zero value. The value can be calculated
as follows.
UTDL = f_UART / (16 * desired baud rate)
The UART clock is generated by clock generator block. It is recommended that the
frequency of UART clock is set to 3.6864MHz, so the desired baud rate can be
acquired by writing a value to UTDL register as follows.
UTDL = 230400 / (desired baud rate)
Preliminary
10-3