TCC76 Datasheet, PDF (123/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
USB CONTROLLER
9 USB CONTROLLER
9.1 Overview
The TCC76x supports a fully compliant to USB 1.1 specification, full-speed (12 Mbps)
functions and suspend/resume signaling. The USB function controller has an endpoint
EP0 for control and two in/output endpoints EP1/EP2 for bulk data transaction. The
endpoint EP0 has a single 64 byte FIFO; Max packet size is 64 bytes. And the endpoint
EP1 and EP2 have a single 128 byte FIFO, respectively. Max packet size of EP1 and EP2
is 64 bytes.
There are 4 types of internal registers;
IN_CSR
OUT_CSR
IN_MAXP
OUT WRITE COUNT
IN Control Status Register
OUT Control Status Register
IN Maximum Packet size Register
OUT Write Count Register
Interrupt (Status) and Interrupt Enable registers are broken down into 2 banks: Endpoint
Interrupts, USB Interrupts. The MAXP, ENDPOINT INTERRUPT and ENDPOINT
INTERRUPT ENABLE registers are used regardless of the direction of the endpoint.
The associated CSR registers correspond to the direction of endpoint.
The TCC76x supports also 1 port of USB host interface that has the following features.
OHCI Rev. 1.0 compliant
USB Rev. 1.1 compatible
1 down stream port
Preliminary
9-1