TCC76 Datasheet, PDF (84/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTERRUPT CONTROLLER
5.2 Register Description
Table 5.1 Interrupt Controller Register Map (Base Address = 0x80000100)
Name
Address Type Reset
Description
IEN
0x00
R/W 0x00000000 Interrupt Enable Register
CREQ
0x04
W
-
Clear Interrupt Request Register
IREQ
0x08
R 0x00000000 Interrupt Request Flag Register
IRQSEL
0x0C
R/W 0x00000000 IRQ/FIQ Select Register
ICFG
0x10
R/W 0x00000000 External Interrupt Configuration Register
MREQ
0x14
R 0x00000000 Masked Interrupt Request Flag Register
TSTREQ
0x18
R/W 0x00000000 Test Mode Register (must be remained zero)
IRQ
0x20
R
-
IRQ Raw Status (IREQ & IRQSEL)
FIQ
0x24
R
-
FIQ Raw Status (~IREQ & IRQSEL)
MIRQ
0x28
R
-
Masked IRQ Status (IRQ & IEN)
MFIQ
0x2C
R
-
Masked FIQ Status (FIQ & IEN)
TMODE
0x30
R/W 0x000007C0 Trigger Mode (0: edge, 1:level)
SYNC
0x34
R/W 0x00000000 Synchronizer Control
WKUP
0x38
R/W 0x00000000 Wakeup Control
Caution)
Some peripherals have their own request flags as well as the flag in interrupt controller, so in the
interrupt service routine, user should clear their own request flags in the peripherals ahead of clearing
the flag in the interrupt controller.
The following pseudo code illustrates the sequence of processing the timer interrupt flags.
if (MREQ & TimerREQ) {
if (TIREQ & Timer0) {
process_timer0();
TIREQ = Timer0;
}
if (TIREQ & Timer1) {
process_timer1();
TIREQ = Timer1;
}
if (TIREQ & Timer2) {
process_timer2();
TIREQ = Timer2;
}
if (TIREQ & Timer3) {
process_timer3();
TIREQ = Timer3;
}
if (TIREQ & Timer4) {
process_timer4();
TIREQ = Timer4;
}
if (TIREQ & Timer5) {
process_timer5();
TIREQ = Timer5;
}
CREQ = TimerREQ;
}
// If timer interrupt flag is set
// Process Timer0 interrupt
// Clear the flag of Timer0
// Process Timer0 interrupt
// Clear the flag of Timer1
// Process Timer0 interrupt
// Clear the flag of Timer2
// Process Timer0 interrupt
// Clear the flag of Timer3
// Process Timer0 interrupt
// Clear the flag of Timer4
// Process Timer0 interrupt
// Clear the flag of Timer5
// Clear the flag of Timer
Preliminary
5-2