TCC76 Datasheet, PDF (148/259 Pages) List of Unclassifed Manufacturers – 32-bit RISC Microprocessor For Digital Media Player

TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
GSIO PORT
11.2 Register Description
Table 11.1 GSIO Register Map (Base Address = 0x80000700)
Name
Address Type Reset
Description
GSDO0
0x00
R/W Unknown GSIO0 Output Data Register
GSDI0
0x04
R/W Unknown GSIO0 Input Data Register
GSCR0
0x08
R/W 0x0000 GSIO0 Control Register
GSGCR
0x0C R/W 0x0000 GSIO Global Control Register
GSDO1
0x10
R/W Unknown GSIO1 Output Data Register
GSDI1
0x14
R/W Unknown GSIO1 Input Data Register
GSCR1
0x18
R/W 0x0000 GSIO1 Control Register
GSDO2
0x20
R/W Unknown GSIO2 Output Data Register
GSDI2
0x24
R/W Unknown GSIO2 Input Data Register
GSCR2
0x28
R/W 0x0000 GSIO2 Control Register
GSDO3
0x30
R/W Unknown GSIO3 Output Data Register
GSDI3
0x34
R/W Unknown GSIO3 Input Data Register
GSCR3
0x38
R/W 0x0000 GSIO3 Control Register
GSIOn Output Data Register (GSDO0 ~ GSDO3)
31 30 29 28 27 26 25 24 23 22
0
15 14 13 12 11 10 9 8 7 6
GSDO[15:0]
0x80000700 + (0x10 * n)
21 20 19 18 17 16
WORD[3:0]
543210
WORD
GSIO word size
[19:16]
N
GSIO data has (N+1) bit unit, N = 0 ~ 15
*) This field is valid only if WS of GSCRn register is set to 1.
GSDO
[15:0]
GSDO
Type
GSIO Output Data
R The value that have been written through register is read
The value is transmitted by LSB or MSB order that is
W
controlled by MS field of GSCRn register.
GSIOn Input Data Register (GSDI0 ~ GSDI3)
31 30 29 28 27 26 25 24 23 22
0
15 14 13 12 11 10 9 8 7 6
Data from GSIO Input Pin
0x80000704 + (0x10 * n)
21 20 19 18 17 16
543210
By writing to GSDOn register, the corresponding GSIO block start to transmit and at the
same time it starts to receive data through the SDI pin. At the end of transmission, the
received data can be read through this GSDIn register. The bit order of receiving
conforms to that of transmission.
Preliminary
11-2