SH7018 Datasheet, PDF (56/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 2.18 Power-Down State
State
Transition
Mode Conditions
Clock
CPU
On-Chip Contents Contents
Peripheral of CPU of On-Chip I/O Port Pin
Modules Registers RAM
States
Recovery
Method
Sleep
mode
SLEEP command
Operating Halted Operating Retained Retained
issued when SBY of
SBYCR is cleared to 0
Retained
(1) Interrupt
(2) Power-on reset
Standby SLEEP command
mode issued when SBY of
SBYCR is set to 1
Halted
Halted Halted or Retained Retained
initialized*
Retained or Hi-Z (1) NMI interrupt
(can be specified _{(2) Power-on reset}
by user)
Note: * Differs depending on the peripheral module and pin.
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