SH7018 Datasheet, PDF (5/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

Preface
The SH7018 is a single-chip RISC (reduced instruction set computer) microcomputer with a CPU
based on Hitachi-original RISC-type SuperH™* architecture as its core. It also provides
peripheral functions essential to system composition.
The CPU incorporated into the chip supports the RISC instruction set. Basic instructions execute
in one cycle (one system clock cycle), so instruction execution times are extremely fast. The chip
has an internal 32-bit architecture for efficient data processing. The CPU is capable of supporting
applications employing real-time control. Such applications were not practical using previous
microcomputers due to the extremely fast processing speeds required. It makes possible the
development of systems providing high performance and excellent functionality at low cost.
The chip incorporates several peripheral functions essential to system composition, such as ROM,
RAM, timers, serial communication interface (SCI), A/D converter, interrupt controller (INTC),
and I/O ports. It also supports external memory access, which allows for efficient connections to
external memory and LSI devices. These features help to reduce system costs substantially.
The SH7018 employs on-chip flash memory with F-ZTAT™* (flexible zero turnaround time). In
addition to allowing programming of the chip by writing to it using a program writer for LSI
devices, software can be written to the flash memory and erased as necessary.
This Hardware Manual describes the hardware features of the SH7018. For detailed information
on the supported instructions, please refer to the Programming Manual.
Note: * SuperH™ and F-ZTAT™ are trademarks of Hitachi, Ltd.
Related Manuals
SH-1/SH-2/SH-DSP Programming Manual.
For information on development environment systems, please contact a Hitachi sales office.