SH7018 Datasheet, PDF (103/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

• Bits 9 and 8—CS2 Space Wait Specification (W21, W20): These bits specify the number of
waits for CS2 space accesses.
Bit 9 (W21)
0
1
Bit 8 (W20)
0
1
0
1
Description
No wait (external wait input disabled)
1-wait external wait input enabled
2-wait external wait input enabled
3-wait external wait input enabled
(Initial value)
• Bits 7 and 6—Reserved. Either 0 or 1 can be written. These bits read the written value.
• Bits 5 and 4—CS1 Space Wait Specification (W11, W10): These bits specify the number of
waits for CS1 space accesses.
Bit 5 (W11)
0
1
Bit 4 (W10)
0
1
0
1
Description
No wait (external wait input disabled)
1-wait external wait input enabled
2-wait external wait input enabled
3-wait external wait input enabled
(Initial value)
• Bits 3 and 2—Reserved. Either 0 or 1 can be written. These bits read the written value.
• Bits 1 and 0—CS0 Space Wait Specification (W01, W00): These bits specify the number of
waits for CS0 space accesses.
Bit 1 (W01)
0
1
Bit 0 (W00)
0
1
0
1
Description
No wait (external wait input disabled)
1-wait external wait input enabled
2-wait external wait input enabled
3-wait external wait input enabled
(Initial value)
87