SH7018 Datasheet, PDF (21/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

1.2 Block Diagram
NMI
RES
MD0 (Vss)
MD1 (Vcc)
MD2 (Vss)
MD3 (Vss)
EXTAL
XTAL
FWP*
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
PVcc
AVcc
Vss
Vss
Vss
Vss
Vss
Port A
Port B
;;;;;;; CPU
Interrupt
;;;^;controller
RAM
4kB
Flash ROM
160 kB
Bus state
controller
;; _Timers
Multifunction
;;;;; timerpulseunit ×3
Compare match × 2
8-bit timer
×1
Serial communication
interface
(× 1 channel)
A/D
Watch-
converter dog timer
;;;;;;;; _{Port F}
Port E
PC15/A15
PC14/A14
PC13/A13
PC12/A12
PC11/A11
PC10/A10
PC9/A9
PC8/A8
PC7/A7
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
PD7/D7
PD6/D6
PD5/D5
PD4/D4
PD3/D3
PD2/D2
PD1/D1
PD0/D0
Vss
Vss
;^{;; Vss}
Vss
Vss
AVss
Note: * FWE during write mode
: Peripheral address bus
: Peripheral data bus
: On-chip address bus
: On-chip upper data
: On-chip lower data
Figure 1.1 Block Diagram of SH7018 (TFP-100B Pins)
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