SH7018 Datasheet, PDF (388/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

VCC
tOSC1
Memory read
mode
Command wait state
Command Automatic write mode Normal/abnormal
tbmv ^{wait state Automatic erase mode complete verify} tdwn
RES
FWE
Note : For the level of FWE input pin, set V_IL when using other than the automatic write mode
and automatic erase mode.
Figure 16.26 Oscillation Stabilization Time, Boot Program Transfer Time,
and Power-Down Sequence
16.11.9 Notes On Memory Programming
1. When programming addresses which have previously been programmed, carry out auto-
erasing before auto-programming.
2. When performing programming using PROM mode on a chip that has been
programmed/erased in an on-board programming mode, auto-erasing is recommended before
carrying out auto-programming.
Notes: 1. The flash memory is initially in the erased state when the device is shipped by Hitachi.
For other chips for which the erasure history is unknown, it is recommended that auto-
erasing be executed to check and supplement the initialization (erase) level.
2. Auto-programming should be performed once only on the same address block.
Additional programming cannot be performed on previously programmed address
blocks.
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