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SH7018 Datasheet, PDF (19/431 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
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Table 1.1 Features (cont)
Item
Multifunction timer pulse
unit (MTU) Ã 3 channels
Specification
⢠16-bit free running counter à 3 channels
⢠Eight compare match registers
⢠Interrupt requests are generated by compare match and overflow
operations.
Compare match timer
(CMT) Ã 2 channels
⢠16-bit free running counter à 2 channels
⢠Compare registers: 1 per channel
⢠Interrupt requests are generated by compare match operations.
Watchdog timer (WDT)
⢠Can be switched between watchdog timer and interval timer
functions.
⢠Internal reset or interrupt generated by counter overflow.
5 V I/O pins
⢠By specifying the power supply for the input/output circuitry, PVCC,
the input/output voltage level for the following pins can be set to
either 3.3 V or 5 V: RES, NMI, IRQ0, WAIT, D0 to D7, SCK, TxD,
RxD, TIOC0A, TIOC0C (total 17 pins).
8-bit timer (TIM2)
⢠8-bit interval timer function
⢠Interrupt generated by compare match operations.
Serial communication
interface (SCI)
⢠Asynchronous or clock-synchronous mode is selectable (full duplex)
⢠On-chip dedicated baud rate generator
⢠Multi-processor communication function
I/O ports
A/D converter
⢠62 inputs and outputs
⢠8 inputs
⢠10 bits à 8 channels
⢠Built-in sample and hold function
On-chip memory
⢠RAM: 4 kB
⢠ROM: 160 kB (F-ZTAT)
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