SH7018 Datasheet, PDF (246/431 Pages) Renesas Technology Corp – SuperH™ RISC engine

Initialize
Clear TE and RE bits to 0 in SCR1
Set CKE1 and CKE0 bits in SCR1 (1)
(TE and RE bits are 0)
Select transmit/receive format in SMR1 (2)
Set value to BRR1
(3)
Wait
No
1-bit interval elapsed?
Yes
Set TE or RE to 1 in SCR1; Set RIE,
TIE, TEIE, and MPIE as necessary ⁽⁴⁾
End
Figure 12.4 Sample Flowchart for SCI1 Initialization
Transmitting Serial Data (Asynchronous Mode): Figure 12.5 shows a sample flowchart for
transmitting serial data. The procedure is as follows (the steps correspond to the numbers in the
flowchart):
1. SCI1 initialization: Set the TxD pin using the PFC.
2. SCI1 status check and transmit data write: Read the serial status register (SSR1), check that the
TDRE bit is 1, then write transmit data in the transmit data register (TDR1) and clear TDRE
to 0.
3. Continue transmitting serial data: Read the TDRE bit to check whether it is safe to write (if it
reads 1); if so, write data in TDR1, then clear TDRE to 0.
4. To output a break at the end of serial transmission, first clear the port data register (DR) to 0,
then clear the TE to 0 in SCR1 and use the PFC to establish the TxD pin as an output port.
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